FIG. 1 shows a schematic block diagram of a generic Linear Voltage Regulator (100), with its main components being the Error Amplifier (101), the Gate Driver (102), the feedback network consisting R2 (103) and R1 (104), the load network consisting of RL (105) and CL (106) and last, but certainly not the least, the pass device MPASS (107). The closed loop operation of the voltage regulator fixes the output voltage VOUT (108) to VOUT=VREF*(1+R2/R1), by forcing the feedback node VFB (111) to be equal to the reference voltage VREF (110). It is interesting to note that the output voltage is independent of the Input Supply VIN (109). Throughout this description, the terms, “power/input supply,” “supply,” “VIN,” and “VIN terminal or node” may be used interchangeably to refer to the power source input to a voltage regulator, which may or may not be a high voltage such as 15V, or even higher.
The reference voltage input to the regulator is usually generated from a band gap circuit. The error amplifier (101) may be a single stage or a multi-stage amplifier. The resistor R2 may be a short circuit, and/or the resistor R1 may be an open circuit in some architectures. The pass device can be an n-type or a p-type Bipolar Transistor, a CMOS transistor, an LDMOS or even a FINFET, as per the manufacturing process and specifications. For CMOS implementations, as far as the pass device is concerned, it is preferred to use an NMOS device instead of a PMOS device for two main reasons, explained in the next paragraph.
First, the size of the pass device for a given drop-out voltage (i.e. voltage difference between VIN (110) and VOUT (108)) and current rating is at least a factor of two-three times smaller than the corresponding PMOS transistor, due to inherently better mobility and so forth. Second, the small signal output impedance of an NMOS device (1/gm) is much lower than a PMOS device (gds). This essentially means improved AC drive capability, especially in presence of larger capacitive loads, which translates to better loop stability for wide ranges of output load capacitors. However, the NMOS transistor requires enough voltage overdrive at its gate to be able to operate as required, and usually, the highest the gate can rise, is dictated by the available input supply (the minimum level that has to be supported) and the amount of voltage headroom needed by the gate driver circuit. Essentially, this translates to a high drop-out voltage for the regulator. Drop-out for a regulator quantifies how close the output can be to the minimum Input Supply. The smaller the drop-out, the more efficient the regulator. It is hence obvious that achieving low drop-out and having an NMOS pass device are conflicting requirements, having to be traded-off against each other. However, it is worthwhile to point out that this is not the case all the time, as there are several applications where the input supply might be much larger, whereas the output has to be kept at a low enough level to support appropriate loads.